Method of fabricating an integrated circuit device utilizing ele

Details Method of fabricating an integrated circuit device utilizing ele Method of fabricating an integrated circuit device utilizing ele

1979-07-10

1982-09-14

Rutledge, L. Dewayne

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29577C, 29591, 148175, 156643, 1566591, 156904, 357 4, 357 49, 357 50, 357 59, 430313, 430314, 430317, 430942, H01L 21302, H01L 21312

Patent

active

043488048

ABSTRACT:
Dielectric isolation through electron beam irradiation is applied to a method of fabricating a semiconductor device. Upon forming an insulated gate field effect semiconductor device (FET) in a semiconductor layer on an insulation substrate, the insulated gate electrode is formed to extend over the semiconductor layer region around a semiconductor region in which FET is to be implemented. A semiconductor layer pattern underlying the extension of the gate electrode is enclosed by linear dielectric layers formed along the periphery of the electrode extension through electron beam irradiation. The pattern formation can be accomplished in a short time by virtue of arrangement such that the semiconductor layer pattern is enclosed by the linear dielectric layers. Electric coupling such as capacitive coupling between the gate electrode and other conductor layers is significantly reduced.

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patent: 4139442 (1979-02-01), Bondur et al.
patent: 4184909 (1980-01-01), Chang et al.
patent: 4267259 (1981-05-01), Bohlen et al.

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