Method for manufacturing asymmetrical LDD type MIS device

Details Method for manufacturing asymmetrical LDD type MIS device Method for manufacturing asymmetrical LDD type MIS device

1996-02-01

1997-03-04

Tsai, Jey

Fishing, trapping, and vermin destroying

437 41, 437 44, H01L 21265

Patent

active

056078692

ABSTRACT:
In a method for manufacturing an asymmetrical LDD type MOS transistor, low concentration impurity diffusion regions are formed within a semiconductor substrate on both sides of a gate electrode. Then, sidewall insulating layers are formed on both sides of the gate electrode, and, after that, high concentration inpurity diffusion regions are formed within the semiconductor substrate on both sides of the sidewall insulating layers. Then, one of the sidewall insulating layers is removed simulataneously with formation of contact holes in an interlayer formed on on the entire surface. Finally, impurities are implanted with a mask of the interlayer, to enlarge one of the high concentration impurity diffusion regions.

REFERENCES:
patent: 4997779 (1991-03-01), Kohno
patent: 5286664 (1994-02-01), Horiuchi
patent: 5330925 (1994-07-01), Lee et al.

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