Floor-planning apparatus for hierarchical design of LSI

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364488, 364491, G06F 1560

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active

054187338

ABSTRACT:
A floor-planning apparatus for designing an LSI circuit including a storage unit storing logic circuit interconnection information, grouping information and macro information. A unit is provided for disposing the macro and the groups. The result of disposition is displayed on a screen and the function blocks are grouped according to the request from the exterior. A display is provided for displaying a rats net of the interconnection between the macros and also between the groups to achieve a desirable arrangement. A calculating unit is used to calculate the schematic wiring length between the macro groups and evaluate the schematic wiring length so as to replace an output side function block by a function block for high duty driving, when the length of the wiring is longer than the predetermined length, thereby reducing the time required for the LSI designing.

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patent: 5046017 (1991-09-01), Yuyama et al.
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patent: 5187668 (1993-02-01), Okude et al.
patent: 5191542 (1993-03-01), Murofushi
L. S. Woo, et al, "Pioneer: A Macro-Based Floor-Planning Design System", VLSI Systems Design, Aug. 1986, pp. 32-43.

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