Analog-digital converter with distributed sample-and-hold circui

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341159, H03M 114

Patent

active

054444470

ABSTRACT:
The disclosure relates to analog-digital converters. It is sought to limit the power consumption and obtain a better compromise among the different performance characteristics of the computer. In a general structure of a converter there are, firstly, a coarse converter for the most significant bits and, secondly, a fine converter for the least significant bits. One of them, generally, the fine converter, has differential amplifiers [AD(1) to AD(N)]receiving the voltage to be converted (Ve) and a reference voltage. It is proposed to place sample-and-hold circuits [EB(1) to EB(N)] at output of these differential amplifiers and to eliminate the sample-and-hold circuit that is often placed upline with respect to these amplifiers.

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patent: 5117227 (1992-05-01), Goeke
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patent: 5159342 (1992-10-01), Yotsuyanagi
patent: 5274377 (1993-12-01), Matsuura et al.
patent: 5321402 (1994-06-01), Matsuzawa et al.
I.E.E.E. Journal of Solid-State Circuits vol. SC-22, No. 6, Dec. 1987 New York pp. 944-953.
Electronic Components & Applications vol. 8, No 3, 1988 Eindhoven, The Netherlands pp. 171-174.

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