Nonvolatile memory structure for programmable logic devices

Details Nonvolatile memory structure for programmable logic devices Nonvolatile memory structure for programmable logic devices

1997-06-06

1999-11-02

Zarabian, A.

Static information storage and retrieval

Floating gate

Particular biasing

36518526, G11C 1134

Patent

active

059782722

ABSTRACT:
A nonvolatile memory structure is disclosed. The nonvolatile memory structure includes a substrate, a heavily doped drain junction disposed in the substrate, and a lightly doped source junction disposed in the substrate. The source junction is diffused more deeply than the drain junction. The nonvolatile memory structure also includes a gate structure. The gate structure has a floating gate capacitively coupled to the substrate and a control gate capacitively coupled to the floating gate. The heavily doped drain junction has a central portion proximate to the gate structure. The lightly doped source junction also has a central portion proximate to the gate structure. At least the central portion of the lightly doped source junction is more lightly doped than the central portion of the heavily doped drain junction.

REFERENCES:
patent: 5480821 (1996-01-01), Chang
patent: 5659504 (1997-08-01), Bude et al.

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