Semiconductor device having an interconnection pattern

Details Semiconductor device having an interconnection pattern Semiconductor device having an interconnection pattern

1994-04-28

1995-05-23

Larkins, William D.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257 77, 257642, 257762, 257765, 257770, H01L 2946, H01L 2954, H01L 2962

Patent

active

054183979

ABSTRACT:
Disclosed is a method of forming an interconnection pattern which causes no disconnection even when making contact with water in the atmosphere. An interconnection layer is formed on a semiconductor substrate. The interconnection layer is selectively etched by employing a halogen-type gas, to form an interconnection pattern. Ultraviolet rays are directed onto the interconnection pattern in the atmosphere including a hydrogen gas. This method avoids generation of hydrogen halogenide which causes corrosion of metal interconnections even when the metal interconnections make contact with water in the atmosphere, thereby to prevent disconnections of the metal interconnections.

REFERENCES:
patent: 3571919 (1971-03-01), Gleim et al.
patent: 4643799 (1987-02-01), Tsujii et al.
patent: 4825808 (1989-05-01), Takahashi et al.
patent: 5017513 (1991-05-01), Takeuchi
patent: 5148259 (1992-09-01), Kato et al.
"VLSI Electronics Microstructure Science", Norman G. Einspruch et al., vol. 15, VLSI Metallization, 1987, Academic Press, Inc., pp. 184-219.
N. Einspruch, "VLSI Electronics-Microstructure Science", 1987, vol. 15, Academic Press, Inc., pp. 186-204.

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