DC offset circuit for cartesian loop

Details DC offset circuit for cartesian loop DC offset circuit for cartesian loop

1994-12-09

1997-05-06

Pascal, Leslie

Telecommunications

Transmitter

With feedback of modulated output signal

455115, 375216, 375284, H04B 104

Patent

active

056280599

ABSTRACT:
In a DC offset circuit for a Cartesian loop, a DSP supplies step by step a slope voltage from a minimum DC output voltage, up to a maximum DC output voltage, to input sections of operational amplifiers for modulation. This arises each time transmission is started in a state where a signal Q' and a signal I', each based on only a carrier wave, are outputted from a quadrature demodulator. When comparators detect that output from operational amplifiers is 0 V, the DSP decides a value of the slope voltage then as a DC offset voltage value. Operation is started centering on this DC offset voltage value.

REFERENCES:
patent: 5212814 (1993-05-01), Iwane
patent: 5371481 (1994-12-01), Tittanen
patent: 5381108 (1995-01-01), Whitmarsh
patent: 5396196 (1995-03-01), Blodgett
patent: 5469105 (1995-11-01), Sparks
patent: 5483681 (1996-01-01), Bergsten

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