Multi-dimensional data transfer in a data processing system and

Details Multi-dimensional data transfer in a data processing system and Multi-dimensional data transfer in a data processing system and

1994-12-05

1997-05-06

Ray, Gopal C.

395842, G06F 1328, G06F 1200

Patent

active

056280262

ABSTRACT:
To execute a three-dimensional DMA transfer, a transfer counter register (76), which is partitioned into three sections, is loaded with initial counter values. Each section of the counter register (76) is independently controlled by a counter (72, 73, 74). Data is transferred from consecutive generated addresses for a first predetermined number of times as determined by the value in the first section of the counter register (76). An offset value is then added to a last generated address. The process is repeated for a second predetermined number of times. Then another offset value is added to the generated address. This entire process is repeated for a given number of times as determined by the third section of the register (76). The initial counter values are reloaded into counter register (76) from a backup register (77), insuring that a DMA controller (80) is ready if a new transfer request requires the same counter values as the previous transfer.

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