Method of making a metal programmable MOS read only memory devic

Details Method of making a metal programmable MOS read only memory devic Method of making a metal programmable MOS read only memory devic

1978-03-20

1983-05-24

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29577R, 29577C, 29578, H01L 21265

Patent

active

043843999

ABSTRACT:
A metal-gate MOS read only memory or ROM array is formed by a process compatible with N-channel silicon gate manufacturing methods for circuits peripheral to the array on the same chip. The ROM is programmed at the time the metal level of contacts and interconnections, is patterned. Address lines and gates are metal in the array, and output and ground lines are defined by elongated N+ regions. Each potential MOS transistor in the array is programmed to be a logic "1" or "0" by patterning the metal to cover the gate or not. After metal patterning, the array is ion implanted through exposed gate oxide in the gates not covered by metal so that degradation is prevented.

REFERENCES:
patent: 3641661 (1972-02-01), Canning
patent: 3914855 (1974-10-01), Chevey
patent: 4075754 (1978-02-01), Cook
patent: 4151020 (1979-04-01), McElroy
patent: 4230504 (1980-10-01), Kuo
patent: 4268950 (1981-05-01), Chutterjee et al.
patent: 4290184 (1981-09-01), Kuo
patent: 4326329 (1982-04-01), McElroy

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