Redundant read bus for correcting defective columns in a cache m

Details Redundant read bus for correcting defective columns in a cache m Redundant read bus for correcting defective columns in a cache m

1995-06-06

1997-05-06

Nguyen, Hoa T.

3951832, G06F 1100

Patent

active

056279639

ABSTRACT:
A cache memory architecture having a separate redundant read bus fully dedicated to redundancy and fed by a single spare sub-array common to all memory sub-arrays of the cache memory. Redundant sense amplifiers are dotted to the redundant read bus, and normal sense amplifiers are connected to a main read bus. Normal and redundant data are valid and available at the same time at the outputs of the normal and redundant sense amplifiers. When the late select address signals become valid, then the correct information can be selected via a multiplexer provided with an INHIBIT input. The multiplexer is normally controlled by decoded signals generated by a decoder, unless redundancy is required. If redundancy is required, the information generated by the bit address comparator forces the multiplexer, via the INHIBIT input, to select the redundant read bus, instead of one read bus of the main read bus, and to output the redundant byte as the selected one.

REFERENCES:
patent: 5295114 (1994-03-01), Kobayashi
"An Experimental 1-Mbit CMOS SRAM with Configurable Organization and Operation", by Tod Williams, et al., I.E.E.E. Journal of Solid-State Circuits 23 (1988) Oct., No. 5, New York.

Affiliated with

Also associated with

Rating

Redundant read bus for correcting defective columns in a cache m does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Redundant read bus for correcting defective columns in a cache m, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Redundant read bus for correcting defective columns in a cache m will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2139435