Semiconductor memory address lines with varied interval contact

Static information storage and retrieval – Format or disposition of elements

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357 71, G11C 510

Patent

active

046384588

ABSTRACT:
According to a memory of the invention which can read/write data, word lines are connected to memory cells arranged on a semiconductor substrate. Each word line has a double layered structure comprising first and second conductive lines. An insulative layer is sandwiched between the conductive lines. Since the insulative layer has a plurality of contact holes formed along the extended direction of the first and second lines and spaced by an irregular pitch, the stacked lines are discontinuously and electrically connected to each other through these contact holes.

REFERENCES:
patent: 4278989 (1981-07-01), Baba et al.
patent: 4481524 (1984-11-01), Tsujide
patent: 4587549 (1986-05-01), Ushiku

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