Microprocessor system with programmable interface

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3645135, G06F 305, G06F 1300

Patent

active

046384510

ABSTRACT:
A microprocessor system includes a CPU device with on-chip or off-chip memory, and data and control busses for accessing memory and/or peripherals. The peripheral circuitry includes one or more channels for input and/or output of data, wherein various characteristics of the treatment of data in the channel are controlled by the program being executed in the CPU. In one embodiment analog input and output channels are included, and the A-to-D or D-to-A conversion rates are selected by executing a data output instruction by the CPU. The cut-off points of the filters are likewise selected. The A-to-D converter loads a first-in first-out memory which is read by the CPU in burst mode when filled. Likewise, the CPU loads digital data to a first-in first-out memory in the output channel, and then the D-to-A converts at its selected rate.

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patent: 4193123 (1980-03-01), Meinke
patent: 4202040 (1980-05-01), Whitworth et al.
patent: 4287558 (1981-09-01), Nishitani
patent: 4371947 (1983-02-01), Fujisawa
patent: 4472832 (1984-09-01), Atal et al.

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