Image analysis – Histogram processing – For setting a threshold
Patent
1996-10-28
1999-03-23
Coleman, Eric
Image analysis
Histogram processing
For setting a threshold
39580032, 382209, G06K 962
Patent
active
058871802
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention relates to the area of pattern and type recognition, particularly a pattern-recognition system having N processors and a data storage for processes comprising application algorithms, the data model of the process being objects, links for connecting objects and attributes for describing objects.
As a consequence of the complex problems involved with pattern and type recognition, in the last few years a foundation has been developed which is analogous to object-oriented programming languages (OOPS) and object-oriented data models (OODM). The central idea in this case is that objects that can be conceptualized with all of the collected data of the pattern recognition and are to be represented explicitly are described. Data storage on a data model comprising objects for representing recognition objects, connections between objects for representing structural information for the recognized objects and attributes for describing objects is already known from the Proceedings of the IEEE, Vol. Project Special Identification ITM! 8501 A , Jan. 1, 1985-Mar. 31, 1989, pages 114 to 127. All recognition algorithms receive their input data from this data and store their output data there. Thus, a clear separation of the recognition algorithm aspects from the administration and control aspects can be attained. In particular, recognition algorithms can be developed to correspond specifically to the need. This is already apparent in the dependence of the recognition quality, for example the reading and error rates of address readers, on data records. In a given application, therefore, the algorithms that are always used are those that deliver better results, utilizing all prior knowledge of data records to be recognized in order to recognize them. In type-recognition systems, simple examples of data record characteristics that may be known in advance are font, type size, a limited vocabulary or the position that the type to be recognized occupies in a document. At the same time, the desire for reusability of the algorithms can be satisfied. The recognition methods should be embodied on different computer types having different operating systems, and also be adapted as easily as possible to new problems that arise.
Because recognition algorithms involve a great deal of calculation, the throughputs necessary in practical use can only be attained with parallel computers; a few processing steps must be supported with special hardware. The recognition systems known from the cited prior art are, however, conceptualized as single-process systems.
SUMMARY OF THE INVENTION
The object of the present invention is to disclose a method and an apparatus for pattern recognition with N processors, in which the heterogeneity of the system remains concealed from the recognition algorithms. This object is accomplished by the method of pattern recognition according to the invention wherein each process is exclusively allocated a predetermined number of ports for reading input data and writing input data and the exchange of data between processes is effected implicitly in that data portions are sent to the data storage or received due to the calling of the data access functions.
The pattern-recognition system of the invention offers great flexibility in the structure of different, communicating process systems. Recognition algorithms can be used in single-process or multiple-process systems without being altered. The system is particularly to be used as an efficient, configurable development platform for type-recognition software that can be scaled with respect to throughput.
Further advantageous embodiments of the invention ensue from the description and the dependent claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention is described in more detail below in conjunction with drawings in which
FIG. 1 shows a heterogeneous pattern-recognition system having N processors, and
FIG. 2 is a block diagram illustrating the process of a multiple-process system.
DETAILED DESCRIPTION OF THE INVEN
REFERENCES:
patent: 5345586 (1994-09-01), Hamala et al.
patent: 5459798 (1995-10-01), Bailey et al.
patent: 5588074 (1996-12-01), Sugiyama
patent: 5668897 (1997-09-01), Stolfo
Carlo S. Regazzoni et al.: "Distributed hierarchical regularization system for recognition of planar surfaces". In: Optical Engineering, USA, vol. 32, No. 6 Jun. 1993 ISSN 0091-3286, pp. 1167-1192.
Richard F. Rashid: "An Inter-Process communication facility for UNIX". In: Local Networks for Computer Communications, Proceedings of the IFIP Working Group, Aug. 1980, Amsterdam, NL, pp. 319-354.
Giorgio Cattaneo et al.: "Chill Concurrency on Intel IAPX 432 Architecture". In: Microprocessing & Microprogramming, Netherlands, vol. 15, No. 5, May 1985, ISDSN 0165-6074, pp. 233-251.
Juergen Schuermann et al.: "Document Analysis--From Pixels to Contents". In: Proceedings of the IEEE, US, vol. 80, No. 7, Jul. 1992, ISSN 0018-9219, pp. 1101-1119.
Joseph K. Cross et al.: "Communication among distributed ADA Programs". In: Proceedings of the IEEE 1991, Dayton Oh, vol. 2, May 1991, New York, pp. 627-630.
Dieter Wybranietz et al.: "The LADY programming environment for distributed operating systems". In: Future Generation Computer Systems, NL, vol. 6, No. 3, Dec. 1990, ISSN 0167-739X, pp. 209-223.
Keh Stefan
Von Drachenfels Heiko
Coleman Eric
Licentia Patent-Verwaltungs-GmbH
Monestime Mackly
Spencer George H.
Voorhees Catherine M.
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