Preprogramming testing in a field programmable gate array

Details Preprogramming testing in a field programmable gate array Preprogramming testing in a field programmable gate array

1997-01-03

1999-03-23

Canney, Vincent P.

Excavating

H04B 1708

Patent

active

058870024

ABSTRACT:
A field programmable gate array integrated circuit which has numerous features for testing prior to programming the antifuses in the integrated circuit is provided. The circuits used to program the antifuses are also used for much of the preprogramming testing. The functionality of continuous series transistors and latch logic blocks may be tested together with the continuity of their programmable connections. Programmable input/output buffer circuits and clock circuits which set the desired clock network paths may be tested with signals on a serial scan path which passes through the input/output buffer circuits and clock circuits. Process characterization tests without the requirement of high-speed test equipment are also provided.

REFERENCES:
patent: 4758745 (1988-07-01), El Gamal
"Antifuse Field Programmable Gate Arrays", Greene et al., Proceedings of the IEEE, vol. 81 #7, Jul. 1993, pp. 1042-1056.
"An Architecture for Electrically Configurable Gate Arrays", El Gamal et al., IEEE Journal of Solid State Circuits, vol. 24 #2, Apr. 1989, pp. 394-398.

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