Method and arrangement for transmitting a digital signal with a

Multiplex communications – Wide area network – Packet switching

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375 26, H04J 322

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048872610

ABSTRACT:
A method and arrangement for transmitting a digital signal with a low bit rate in a time section, provided for higher bit rates, of a time division multiplexed signal. At a transmitting end the first digital signal with a low bit rate is over-sampled with a first clock signal assigned to this time section. A second digital signal which results is transmitted in the time division multiplexed signal to a receiving end. Following the demultiplexing of the time division multiplexed signal, this second digital signal is sampled with a second clock signal, corresponding to its bit rate, omitting forbidden phase position zones, and results in a fifth digital signal. The forbidden phase position zones are defined by a shift register, an exclusive-NOR-gate, an upwards/downwards counter and a logic unit. Double samplings are prevented in that the phase of the second clock signal is shifted via the resetting of a frequency divider. The method in accordance with the invention permits for example, the occasional transmission of a digital signal with a lower bit rate in a digital signal multiplex device designed for the grouping of thirty-two 64 kbit/s-signals.

REFERENCES:
patent: 3458309 (1970-12-01), Saltzbert et al.
patent: 4053708 (1977-10-01), Hotchkiss
patent: 4230911 (1980-10-01), Fellinger et al.
patent: 4578797 (1986-03-01), Satoh et al.
"Multiplex Equipment DSMX 64K/2 & Insertion Unit DSE 64K/2 for Digital Transmission" by Graf et al., telecom report 2, (1979), special issue, Digital Transmission.
"Dataport-Channel Units for Digital Data System Substrates", by Aprille, et al., Bell System Technical Journal, vol. 61 (1982), Nov., No. 9, Part 3, pp. 2721 through 2740.

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