Data carrier for identification systems

Registers – Records – Conductive

Patent

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Details

257531, G06K 1906, H01L 2702

Patent

active

053089677

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

The invention relates to a data carrier for identification systems, particularly for use in so-called ident systems which are preferably required in many fields of automation such as self-identification of tools or pallets.


BACKGROUND OF THE INVENTION

In the state of art data carriers of this kind are known. The most commonly used are the so-called chip-cards (as disclosed in DE-PS 3.721.822 and EP 79.047) in which sufficient space is provided for mounting individual discrete circuits. Such cards do not satisfy high requirements concerning transmission effectivity, that is, concerning the voltage and output transmission factor, respectively. DE-PS 3.721.822 discloses a solution in which the antenna coil is small, being applied around the semiconductor chip remote from the active semiconductor areas, and which is easy to produce by simultaneously structuring the conducting and coil patterns. This solution, however, does not ensure a high transmission effectivity owing to the considerably high resistance/capacitance product due to parasitic capacities and layer resistances. The conditions with such data carriers are different, which, for example, are used for tool identification by interacting with a read or write/read unit through remote inductive energy and signal transmission. In this event a high transmission effectivity is required. Such components are exclusively sold as hybrid members. They ensure a high quality of the antenna coils by employing wound coils bonded to further individual discrete elements. Such data carriers are inserted then into bore holes provided in the tool. The structural setup of such data carriers which is comparatively bulky apart from the manner of insertion into a tool requires high technological expenditures due to the connection of the individual components necessary such as coil, logic, storage, and power supply which finally renders the data carrier expensive.


SUMMARY OF THE INVENTION

Hence, it is an object of the invention to provide a data carrier which ensures, in addition to a high degree of minimizing, the transmission effectivity required at a very high transmission frequency. It is a further object of the invention to ensure an efficient energy coupling to microelectronic components. According to the invention these objects are realized by integrating a decoding circuit, a storage circuit, a circuit for providing the supply voltage for the electronic circuits and the antenna coil(s) on a single chip, to thus eliminate the otherwise expensive mounting and connection of the individual components. The reliability is thereby increased and the geometry of the data carrier considerably minimized. The embodiment of the invention and mounting of the antenna coil(s) permits realization a high coil quality which ensures a high transmission factor as concerns voltage and output.


BRIEF DESCRIPTION OF THE DRAWING

The invention will be described hereinafter by means of two embodiments and wherein
FIG. 1 shows a cross-sectional view of a data carrier including a low-ohmic coil monolithically provided to the uppermost contactive path area,
FIG. 2 shows a cross-sectional view of a data carrier including a low-ohmic coil provided on a planarised passivation layer; and
FIG. 3 is a perspective view of the data carrier of FIG. 1.


DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 shows one embodiment of an inventional data carrier in which the integrated coil is devised monolithically and compatibly to the semiconductor technology known heretofore as well as in direct contact to the conductive path of the semiconductor structure and which is arranged in the area of the active semiconductor structure. On the "bulk" of a semiconductive material a semiconductive structure is arranged comprising a diffusion area 1a, a poly-silicon gate 1b, a field insulating layer 1d, an intermediate insulating layer 1c, a metal layer conductive path 1e, a passivation layer 1f, being part of the integrated circuit of the chip. The metal layer 1e and the windows in the passi

REFERENCES:
patent: 4605844 (1986-08-01), Haggan
patent: 4650981 (1987-03-01), Foletta
patent: 4692604 (1987-09-01), Billings
patent: 4791285 (1988-12-01), Ohki
patent: 4797541 (1989-01-01), Billings et al.
patent: 4818853 (1989-04-01), Ohta et al.
patent: 4910394 (1990-03-01), Ohta
patent: 4960983 (1990-10-01), Inoue

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