Patent
1996-02-27
1997-11-25
Harrell, Robert B.
G06F 942
Patent
active
056921683
ABSTRACT:
A prefetch unit includes flow control for controlling the transfer of instruction bytes from a prefetch buffer to a decoder where the prefetch buffer includes predicted change of flow instructions. Instruction bytes in the prefetch buffer are arranged in prefetch blocks--associated with each prefetch block is a flow control bit. When the transfer of instruction bytes from a current prefetch block is complete, the flow control bit is checked--if the flow control bit is set to indicate that the prefetch clock includes a predicted COF instruction, instruction bytes will not be transferred from the next prefetch block unless the predicted COF instruction is confirmed as having been decoded. This flow control avoids the complexity of maintaining information to repair the prefetcher and decoder if the predicted COF instruction is not decoded.
REFERENCES:
patent: 5471598 (1995-11-01), Quattromani et al.
patent: 5584009 (1996-12-01), Garibay, Jr. et al.
patent: 5615402 (1997-03-01), Quattromani et al.
Cyrix Corporation
Harrell Robert B.
Maxin John L.
Viger Andrew S.
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