Fishing – trapping – and vermin destroying
Patent
1991-02-20
1993-03-09
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437173, 437200, H01L 2144, H01L 2148
Patent
active
051927136
ABSTRACT:
A method of manufacturing a semiconductor device comprises the steps of preparing a semiconductor substrate, forming a field oxide layer for isolation between active areas, forming a diffusion layer in a surface of the semiconductor substrate, depositing a first insulating interlayer on the semiconductor substrate, forming a W-polycide layer including As on the first insulating interlayer selectively, depositing a second insulating interlayer on the first insulating interlayer and on the W-polycide layer, forming a first contact hole with a shallow depth on the W-polycide layer and a second contact hole with a deep depth on the diffusion layer, depositing a W layer in only the second contact hole by selective CVD so as not to form a step with the second insulating interlayer and, contacting the W-layer and the polycide layer by forming a wiring layer on the surface of the second insulating layer.
REFERENCES:
patent: 4648175 (1987-03-01), Metz, Jr. et al.
patent: 4764484 (1988-08-01), Mo
patent: 4933297 (1990-06-01), Lu
patent: 4987099 (1991-01-01), Flanner
patent: 5006484 (1991-04-01), Harada
patent: 5049514 (1991-09-01), Mori
patent: 5108941 (1992-04-01), Paterson et al.
Chaudhuri Olik
OKI Electric Industry Co., Ltd.
Trinh Loc Q.
LandOfFree
Method of manufacturing semiconductor devices having multi-layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor devices having multi-layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor devices having multi-layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-211234