Feedback register configuration for a synchronous vector process

Details Feedback register configuration for a synchronous vector process Feedback register configuration for a synchronous vector process

1993-08-09

1996-03-12

Geckil, Mehmet

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

395550, 395821, 358335, 3642319, 364260, 3642715, 364DIG1, G06F 1500, G06F 1564, G06F 1576

Patent

active

054993750

ABSTRACT:
A Serial Video Processor (SVP) is provided for processing data through a plurality of parallel processing elements (228). Data is first stored in a data input register (DIR) (222) and then processed through the PE (228). The data is then output into a Data Output Register (DOR) (230). During one pass of data through the PE (228), a variable is calculated and stored in an auxiliary register (242). This auxiliary value is typically selected from one of the processing elements representing a value over the entire or part of the input vector of data. A multiplexer (248) selects this value from the output value stored in the register (242) and then inputs it to a second multiplexer (240). The second multiplexer (240) is operable to select either a predefined variable from either another auxiliary register (238) or from an instruction generator ROM (236), or select the precalculated variable stored in the register (242). When the variable in the register (242) is selected, it is globally spread over the entire PE ( 228) for utilization in a subsequent calculation. In the subsequent calculation, the data utilized to generate the variable was delayed to generate the variable and then utilize the variable in a present calculation.

REFERENCES:
patent: 4665556 (1987-05-01), Fukushima et al.
patent: 4850027 (1989-07-01), Kimmel
patent: 5093722 (1992-03-01), Miyaguchi et al.
patent: 5155852 (1992-10-01), Murakami et al.
patent: 5210705 (1993-05-01), Chauvel et al.

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