Process for polishing and analyzing an exposed surface of a patt

Details Process for polishing and analyzing an exposed surface of a patt Process for polishing and analyzing an exposed surface of a patt

1995-06-05

1997-11-25

Tsai, Jey

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438691, 438693, 438759, 438 7, H01L 21302

Patent

active

056912536

ABSTRACT:
A layer over a patterned semiconductor is polished and analyzed to determine a polishing endpoint. The analysis may be performed using reflected radiation beams or by a radiation scattering analyzer. The analysis may be performed on virtually any layer using a radiation source. The analysis may be performed with a liquid, such as an aqueous slurry, contacting the substrate. The polishing and analysis may be integrated such that both steps are performed on the same polisher.

REFERENCES:
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patent: 4147435 (1979-04-01), Habegger
patent: 4660980 (1987-04-01), Takabayashi et al.
patent: 5036015 (1991-07-01), Sandhu et al.
patent: 5220405 (1993-06-01), Barbee et al.
patent: 5305089 (1994-04-01), Hosoe
Abe, et al.; "Microroughness Measurements on Polished Silicon Wafers"; Japanese Journal of Appl. Phys.; vol. 31, Pt. 1, No. 3; pp. 721-728 (1992).
Horio, et al.; "Comparison of Some Instruments for Measuring Mirrorlike Surfaces;" Nanotechnology, vol. 2; pp. 33-38 (1991).
Montogomery, et al.; "Three Dimensional Nanoprofiling of Semiconductor Surfaces;" SPIE vol. 1332; pp. 515-524 (1990).

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