Method of making low profile shallow trench double polysilicon c

Details Method of making low profile shallow trench double polysilicon c Method of making low profile shallow trench double polysilicon c

1997-05-19

1997-11-25

Picard, Leo P.

Fishing, trapping, and vermin destroying

437 47, 437 60, 437 49, 437203, 3613214, H01L 21256

Patent

active

056912528

ABSTRACT:
A method for forming a double layer planar polysilicon capacitor for use within integrated circuits is presented. Formed within a semiconductor substrate is a deep trench which is filled with a dielectric material. Formed within the dielectric material within the deep trench is a shallow trench which has a first polysilicon capacitor plate formed therein. The upper surface of the first polysilicon capacitor plate is substantially planar with the semiconductor substrate. Formed upon the first polysilicon capacitor plate is a polysilicon capacitor dielectric layer. Formed upon the polysilicon capacitor dielectric layer is a second polysilicon capacitor plate.

REFERENCES:
patent: 5173437 (1992-12-01), Chi
patent: 5208657 (1993-05-01), Chatterjee et al.
patent: 5394000 (1995-02-01), Ellul et al.

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