Fault tolerant communication control processor

Multiplex communications – Wide area network – Packet switching

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Details

370 582, 370 68, 370 856, 370 857, H04J 316, H04Q 3545, H04Q 1104

Patent

active

053032306

ABSTRACT:
A fault tolerant communication control processor in a time division multiplex communication system is set up with microprocessor units executing communication control programs, line control units processing the transferred data for transmission or reception by channel and time slot control units for assigning the channel addresses to time slots. The time slot control units are operative to control the information of correspondence between channel addresses and time slots. When any one of the time slot control units receives new instructions for channel assignment from a microprocessor unit, it is operative to execute exclusive control by informing the other time slot control units not to use the newly instructed channel.

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K. Neufang, "Das DigitalKoppalnetz im System EWSD", Telecom Report-Digitalvermittlungssystem EWSD, No. 4, 1981, pp. 28-32.

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