Voltage comparator and subranging A/D converter including such v

Details Voltage comparator and subranging A/D converter including such v Voltage comparator and subranging A/D converter including such v

1992-09-29

1994-04-12

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307355, 307360, 307361, H03K 524

Patent

active

053028694

ABSTRACT:
A voltage comparator for use in a subranging A/D converter includes a coarse preceding comparison circuit 30, a fine preceding comparison circuit 31, and an amplification circuit 32 having an automatic zero compensation function. The coarse preceding comparison circuit 30 compares an analog input voltage Vin and a coarse reference voltage Vai. The fine preceding comparison circuit 31 compares the analog input voltage Vin and a fine reference voltage Vbi. The coarse and fine preceding comparison circuits 30, 31 sequentially outputs comparison results to the amplification circuits 32 so that the comparison results do not overlap each other. The amplification circuits 32 resets offset voltages before amplifying the comparison results applied. The number of elements necessary for a subranging A/D converter can be reduced, and a voltage comparator operating at a high speed and highly accurately can be provided.

REFERENCES:
patent: 4149160 (1979-04-01), Bozarth et al.
patent: 4533903 (1985-08-01), Yamada et al.
patent: 4542370 (1985-09-01), Yamada et al.
patent: 4547683 (1985-10-01), Bingham
patent: 4900952 (1990-02-01), Hosotani et al.
patent: 5036223 (1991-07-01), Sakai et al.
"A CMOS 40 MHz 8b 105 mW Two-Step ADC", by Noriyuki Fukushima et al., 1989 IEEE International Solid-State Circuits Conference, pp. 14-15.
"An 8-bit 20-MS/s CMOS A/D Converter with 50-mW Power Consumption", by Shiro Hosotani et al., IEEE Journal of Solid-State Circuits, vol. 25, No. 1, Feb. 1990, pp. 167-172.

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