EEPROM with enhanced reliability by selectable V.sub.PP for writ

Details EEPROM with enhanced reliability by selectable V.sub.PP for writ EEPROM with enhanced reliability by selectable V.sub.PP for writ

1996-07-19

1997-12-30

Nelms, David C.

Static information storage and retrieval

Floating gate

Multiple values

36518521, 36518529, 36518533, 365218, G11C 1134, G11C 700

Patent

active

057038074

ABSTRACT:
A circuit and method for generating an erasure voltage and a programming voltage for an EEPROM array, the cells of the EEPROM array being capable of erasure and programming. A signal having an increasing voltage is generated. That signal is monitored, and the increase in voltage of said signal is terminated when the signal reaches a first selected maximum level in an erase operation of at least one cell of the EEPROM array. In a program operation of at least one cell of the EEPROM array, the increase in voltage of the signal is terminated when said signal reaches a second selected maximum level.

REFERENCES:
patent: 4628487 (1986-12-01), Smayling
patent: 4855954 (1989-08-01), Turner et al.
patent: 5006974 (1991-04-01), Kazerounian et al.
patent: 5175706 (1992-12-01), Edme
patent: 5282170 (1994-01-01), Van Buskirk et al.

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