Method and apparatus for dispatching and executing a load operat

Details Method and apparatus for dispatching and executing a load operat Method and apparatus for dispatching and executing a load operat

1996-12-11

1998-02-10

Kriess, Kevin A.

395800, G06F 900

Patent

active

057178828

ABSTRACT:
A method and apparatus for performing operations with a processor in a computer system. Load operations are performed by use of a dispatch pipeline and a memory execution pipeline. The dispatch pipeline dispatches the load operation for execution by the processor, while the memory execution pipeline controls the execution of the load operation to memory. The present invention reduces the latency involved in executing a load operation by coupling the execution of the two pipelines during execution of the load operation.

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Popescu, Val; Schultz, Merle; Spracklen, John; Gibson, Gary; Lightner, Bruce; Isaman, David, "The Metaflow Architecture", IEEE Micro, Jun. 1991, pp. 10-13 and 63-73.
Johnson, Mike; Superscalar Microprocessor Design; Prentice Hall, Inc., New Jersey, 1991.

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