Random access memory employing single ended sense latch for one

Details Random access memory employing single ended sense latch for one Random access memory employing single ended sense latch for one

1975-06-30

1976-09-28

Robinson, Thomas A.

Communications: electrical

Digital comparator systems

307238, 307279, G11C 1140, H03K 3281

Patent

active

039835456

ABSTRACT:
A monolithic random access memory having a plurality of groups of storage cells, each storage cell of each group being adapted to store an electrical manifestation of a binary 1, or an electrical manifestation of a binary 0, a sense latch for each of said groups of storage cells for controllably sensing the binary value 0 or 1 stored in any one of said storage cells included within the group of storage cells with which said sense latch is associated, each of said sense latches comprising: a first field effect transistor directly connected to each cell of a group of said storage cells, second, third, fourth and fifth field effect transistors respectively connected to said first field transistor and to each of the other ones of said second, third, fourth and fifth field effect transistors, means for controlling the conductivity of said first, second, third, fourth and fifth transistors on a selective basis, whereby a binary 1 or a binary 0 may be read from and restored to any predetermined cell in each group.

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