Linear high gain sampling amplifier

Details Linear high gain sampling amplifier Linear high gain sampling amplifier

1980-09-25

1982-05-25

Masinick, Michael A.

Facsimile and static presentation processing

Facsimile

Recording apparatus

358 74, 358 27, H04N 568

Patent

active

043319815

ABSTRACT:
A signal sampling circuit comprising a switch network coupled to a transconductance amplifier for providing output currents proportional to input voltage, an input clamp network, and a charge storage device is disclosed. The amplifier signal input is clamped to a reference potential via a negative current feedback path when the switch occupies a first position during nonsampling, clamping intervals. During subsequent sampling intervals, the switch occupies a second position for decoupling the feedback path and coupling the amplifier output to the storage device, so that the storage device then develops a sample of amplifier output signals, referenced to the clamping potential, as a function of amplifier output currents.

REFERENCES:
patent: 2792496 (1957-05-01), Rhodes
patent: 2863943 (1958-12-01), Luther
patent: 2930843 (1960-03-01), Cooper
patent: 3543169 (1970-11-01), Hill
patent: 4200882 (1980-04-01), Janssen
patent: 4209808 (1980-06-01), Harwood
patent: 4224640 (1980-09-01), Hovens
Cohen, "Sample and Hold Circuits Using FET Analog Gates", EEE.
Burd, et al., "High Performance Sample and Holds", Electronics Engineer, Dec. 1967, pp. 60-64.
National Semiconductor Linear Applications Handbook, p. AN20-7.

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