Patent
1979-06-22
1982-09-21
Clawson, Jr., Joseph E.
357 20, 357 42, 357 89, 357 91, H01L 2978
Patent
active
043509916
ABSTRACT:
A method for fabricating an N-channel silicon MOS field effect transistor on a P-type substrate. The structure retains the natural isolation between devices and the consequent higher device density in an integrated circuit structure than conventional double diffused MOS field effect transistor devices. The device is fabricated by using ion implantation to create an N-type surface layer in the channel and then overcompensating this layer to create a P-type region near the source by ion implanting P-type ions into the source junction region. The source to substrate capacitance is considerably less than that of conventional double diffused MOS devices which provides an improved circuit performance.
REFERENCES:
patent: 3653978 (1972-04-01), Robinson et al.
patent: 3745425 (1973-07-01), Berg et al.
patent: 3891468 (1975-06-01), Ito et al.
patent: 3895390 (1975-07-01), Meiling et al.
patent: 3909320 (1975-09-01), Cauge et al.
patent: 3926694 (1975-12-01), Cauge et al.
patent: 3983572 (1976-09-01), Johnson
patent: 4011576 (1977-03-01), Uchida et al.
patent: 4017888 (1977-04-01), Christie et al.
patent: 4021835 (1977-05-01), Etoh et al.
patent: 4050965 (1977-09-01), Ipri et al.
Johnson William S.
Knepper Ronald W.
Clawson Jr. Joseph E.
International Business Machines Corp.
Jordan John A.
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