Method of and apparatus for addressing a buffer memory in a tran

Details Method of and apparatus for addressing a buffer memory in a tran Method of and apparatus for addressing a buffer memory in a tran

1976-04-06

1978-01-31

Brown, Thomas W.

H04J 300

Patent

active

040717011

ABSTRACT:
In a transit exchange which transfers data signals from incoming to outgoing TDM-links carrying data channels having more than one time slot per TDM-frame in accordance with the channels data rate, there is disclosed a method and apparatus for minimizing the transfer time of data through the exchange by providing a buffer memory with addressed locations which receive incoming data signals via a switch memory from the incoming links and feeds such data signals from the buffer memory to the outgoing links. The data signals in time slots of data channels are read into addressed locations of the buffer memory which are calculated by sequential additions to insure that a minimum time elapses before the data signals are read from the buffer memory.

REFERENCES:
patent: 3766322 (1973-10-01), Moffett et al.
patent: 3840707 (1974-10-01), Hemdal
patent: 3970794 (1976-07-01), Neufang

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