Method of producing dynamic random-access memory cells

Metal treatment – Compositions – Heat treating

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29571, 29578, 148187, 148188, 148190, 357 23, 357 41, H01L 2102, H01L 2118, H01L 2122, H01L 21265

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043505368

ABSTRACT:
The invention is concerned with an improved method of producing a one-transistor cell for a dynamic RAM having a capacitor plate, a transfer gate and a shallow n.sup.+ -type region and a deeper p.sup.+ -type region for a junction capacitance. After formation of a thin oxide layer of a dielectric for an MOS capacitance, a patterned photo resist layer is formed. Using the photo resist layer as a mask, n-type impurities are doped into a semiconductor substrate. The capacitor plate and a masking layer are deposited on the photo resist layer and the thin oxide layer. P-type impurities are doped into the capacitor plate. Then, portions of the capacitor plate and masking layer on the photo resist layer are removed by removing the photo resist layer. An end portion of the capacitor plate is removed from under an edge of the remaining masking layer by etching. The p-type impurities are diffused into the silicon substrate by heating to form the deeper p.sup.+ -type region which does not extend beyond the n.sup.+ -type region.

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Sodini, C. G. et al., Enhanced Capacitor for One-Transistor Memory Cell. in IEEE Transactions on Electron Devices, vol. Ed. 23, pp. 1187-1189, Oct. 1976.
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Oldham, W. G., The Fabrication of Micro Electronic Circuits, in Scientific American, 237(3), pp. 111-128, Sep. 1977.

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