Transfer circuit for defect inspection of an integrated circuit

Details Transfer circuit for defect inspection of an integrated circuit Transfer circuit for defect inspection of an integrated circuit

1983-12-22

1986-04-08

Heyman, John S.

Excavating

324 73AT, 377 54, G01R 3128

Patent

active

045817405

ABSTRACT:
A logic circuit is formed on a gate array chip together with a custom-circuit. Bonding pads mounted on the gate array chip are used as the terminals which send forth or receive data and control signals. The logic circuit is provided with a shift register for holding data to test the flip-flops of the custom-circuit and output data from the flip-flops. The shift register comprises the stages each of which holds 1-bit data selected by a read control signal. The output terminals of the stages are respectively connected to the input terminals of the flip-flops of the custom-circuit through the AND gates which are rendered conducting in response to a set control signal. The output terminals of the flip-flops are connected to the input terminals of the respective stages of the shift register.

REFERENCES:
patent: 3311890 (1967-03-01), Waaben
patent: 3439343 (1969-04-01), Stahle
patent: 3940601 (1976-02-01), Henry et al.
patent: 3967103 (1976-06-01), Cachuela et al.
Defensive Publication No. T930,005, Issued Jan. 7, 1975 to D. K. Chia et al.

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