Current comparator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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327 55, 327 94, G11C 2702

Patent

active

061475181

ABSTRACT:
A current comparator comprises first (1) and second (2) inputs for receiving input currents to be compared. During a first phase (1a) of a clock period the input currents are sensed and stored on first (N1,S7) and second (N2,S8) current memory circuits. On a second phase (1b) of the clock period a switching arrangement (S1 to S4) inverts the input currents and applies them together with the currents stored in the first (N1,S7) and second (N2,S8) current memory circuits to a regenerative latch circuit (P1,P2,S9,S10). During a third phase (2a) of the clock period the comparator produces the comparison result at an output (3). During a fourth phase switches (S5,S6,S9,S10,S11) are operated to reset the comparator to its initial state.

REFERENCES:
patent: 5400273 (1995-03-01), Hughes et al.
patent: 5689205 (1997-11-01), Hughes et al.
patent: 5714894 (1998-02-01), Redman-White et al.
patent: 5773998 (1998-06-01), Hughes et al.
"A Full Nyquist 15 MS/s 8-b Differential Switched-Current A/D Converter", By Mark Bracey et al, IEEE Journal of Solid-State Circuits, vol. 31, No. 7, Jul. 1996, pp. 945-951.

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