Method for manufacturing multilayer wiring board and wiring patt

Details Method for manufacturing multilayer wiring board and wiring patt Method for manufacturing multilayer wiring board and wiring patt

1997-06-06

1999-10-19

Picardat, Kevin M.

Semiconductor device manufacturing: process

Including control responsive to sensed condition

Interconnecting plural devices on semiconductor substrate

438128, 438129, H01L 2100

Patent

active

059703105

ABSTRACT:
To form in a batch manner a thin-film wiring pattern in high precision over an entire region of a ceramics multilayer wiring board containing distortion and deformation, a correction amount of the ceramics multilayer wiring board (rotation angle and movement amount of position of this ceramics multilayer wiring board) is calculated in a computer by applying, for instance, the least squares method to positional coordinate values of each of the LSI mounting areas of the ceramics multilayer board and also to positional coordinate values corresponding thereto on a photomask. A support apparatus for supporting the multilayer wiring board is controlled based upon the calculated correction amount, so that the multilayer wiring board can be aligned with respect to the photomask.

REFERENCES:
patent: 4309811 (1982-01-01), Calhoun
patent: 4816422 (1989-03-01), Yerman et al.
patent: 4843563 (1989-06-01), Takahashi et al.
patent: 4970587 (1990-11-01), Abe
patent: 5102361 (1992-04-01), Katayama et al.
patent: 5252508 (1993-10-01), Masuda
patent: 5298433 (1994-03-01), Furuyama
patent: 5403684 (1995-04-01), Schroeder et al.
Thin Film Handbook, Ohm Publishing Firm, May 30, 1988, pp. 9-10.

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