Patent
1994-07-11
1998-04-21
Elmore, Reba I.
395405, 395406, 395481, 395413, 395600, G06F 1206
Patent
active
057427933
ABSTRACT:
In a computer system having a CPU coupled to a memory wherein the memory is logically divided into a number of logical units, each having a number of memory words, a free memory block header list having a number of free memory block headers, one for each free memory block of a memory pool having a number of the memory words, is provided for tracking free memory blocks in the memory pool. The free memory block headers are organized as a Cartesian binary tree. The free memory block header list is used and maintained to control dynamic allocation and deallocation of free and allocated memory blocks of the memory pool. The memory pool is designed to have a memory pool size in multiples of the memory's logical units. All memory requests are rounded to multiples of the memory's word size. As a result, free and allocated memory blocks of the memory pool may be dynamically allocated and deallocated independent of how the memory is addressed, in particular, whether the memory is virtually or statically addressed.
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Hibdon Greg
Sturges Jay
Elmore Reba I.
Intel Corporation
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