Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Patent
1996-10-02
2000-11-14
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
257 4, 257 41, 257 50, 257775, H01L 2900
Patent
active
061473952
ABSTRACT:
An electrode structure for use in a chalcogenide memory is disclosed. The electrode has a substantially frusto-conical shape, and is preferably formed by undercut etching a polysilicon layer beneath an oxide pattern. With this structure, improved current densities through the chalcogenide material can be achieved.
REFERENCES:
patent: 4442597 (1984-04-01), Roesner
patent: 4576670 (1986-03-01), Schade
patent: 4845533 (1989-07-01), Pryor et al.
patent: 4915779 (1990-04-01), Srodes et al.
patent: 5057451 (1991-10-01), McCollum
patent: 5210598 (1993-05-01), Nakazaki et al.
patent: 5219782 (1993-06-01), Liu et al.
patent: 5296716 (1994-03-01), Ovshinsky et al.
patent: 5504369 (1996-04-01), Dasse et al.
patent: 5557136 (1996-09-01), Gordon et al.
patent: 5851882 (1998-12-01), Harshfield
Carroll J.
Micro)n Technology, Inc.
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