Test pattern generator circuit for IC testing equipment

Details Test pattern generator circuit for IC testing equipment Test pattern generator circuit for IC testing equipment

1998-05-18

1999-10-19

Nguyen, Hoa T.

Excavating

371 275, G01R 3128

Patent

active

059700734

ABSTRACT:
Pattern data comprising N=8 words, where one word comprises m=3 bits, delivered in parallel from a pattern memory 2 is input to a parallel/serial conversion circuit 3. The circuit 3 can be switched between a serial output mode (MC="0") in which data for one word per pin is serially delivered every test cycle and a parallel-serial output mode in which parallel data for n-2 words per pin (m.times.n bits) are serially delivered every test cycle in response to a mode control signal MC.

REFERENCES:
patent: 4710933 (1987-12-01), Powell et al.
patent: 4989209 (1991-01-01), Littlebury et al.
patent: 5497377 (1996-03-01), Muto et al.
patent: 5606568 (1997-02-01), Sudweeks

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