Computer graphics processing and selective visual display system – Computer graphic processing system – Integrated circuit
Patent
1997-07-14
1999-10-19
Tung, Kee M.
Computer graphics processing and selective visual display system
Computer graphic processing system
Integrated circuit
345508, 345509, 345514, 345522, G09G 536
Patent
active
059697288
ABSTRACT:
A graphics system including a frame buffer having two or more buffers, a graphics processor and system memory. The graphics processor includes rendering logic, display logic and a buffer switch memory that stores an address. The display logic reads the address from the buffer switch memory and retrieves rendered data for display from one of the buffers. The rendering logic retrieves a next display list from the system memory after a continue indication is provided, renders the retrieved display list into another buffer, writes an address corresponding to the other buffer into the buffer switch memory and clears the continue indication. The continue indication may be a separate bit or a continue flag provided within each display list. The rendering logic sequences through the plurality of buffers in this manner to render a plurality of display lists. If only two buffers are provided, then the buffer switch memory includes an arm bit and the rendering logic sets the arm bit after rendering each display list. The rendering logic then waits until the arm bit is cleared before retrieving and rendering another display list.
REFERENCES:
patent: 4876651 (1989-10-01), Dawson et al.
patent: 5657478 (1997-08-01), Recker et al.
Cui Mike Xudong
Dye Thomas A.
May Bradley A.
Cirrus Logic Inc.
Luu Sy D.
Shaw Steven A.
Stanford Gary R.
Tung Kee M.
LandOfFree
System and method of synchronizing multiple buffers for display does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method of synchronizing multiple buffers for display, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method of synchronizing multiple buffers for display will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2062479