Inverted chip carrier

Textiles: ironing or smoothing

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Details

387 68, 387 56, 387 80, 174 52FP, 361380, H01L 2302

Patent

active

046958703

ABSTRACT:
Apparatus is disclosed for providing microelectronic, intra-chip and chip-to-chip interconnections in an ultra-dense integrated circuit configuration. An inverted chip carrier 36 comprises a carrier 35 between an improved interconnection device 37 and a semiconductor chip 12. The carrier 37 includes a mesa portion 52 bearing an array of conductive connectors 50 extending above ledge portions 54. Ledge terminals 56 are connected to the connectors 50 atop the mesa 52 by internal carrier conductors 51 and are connected to chip 12 through short, straight wires 58 that are coupled to chip 12 at conductive pads 60. Carrier 35 and chip 12 together form a sub-assembly 39 which mates with an array of complementary connectors 48 on the lower surface of an improved interconnection device 37. The present invention eliminates undesirable and wasteful looped wirebonds and provides substantial increases in volume available for active circuitry per planar die area.

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