Apparatus and method for decoding differential multi-level data

Coded data generation or conversion – Digital code to digital code converters – To or from particular bit symbol

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375289, H03M 508, H04L 2534

Patent

active

059696460

ABSTRACT:
An improved decoder for recovering Non-Return-to-Zero Interface (NRZI) digital data from a multiple layer transition (MLT-3) encoded signal in a 100BASE-TX Ethernet (IEEE Standard 802.3u) uses multiple comparators to minimize jitter in the decoded signal. A CMOS-based biasing circuit receives the differential MLT-3 encoded input signals and control signals from a signal amplitude detection circuit. The biasing circuit adjusts for any DC offset, and also generates offset signals based on respective mid-peak voltage values of the respective differential input signals. Four comparators are then used to detect a prescribed edge transition (e.g., a positive edge) coinciding with the respective mid-peak voltage value in the respective signals. The detected edge transitions are then used by edge decoding logic to generate the NRZI bilevel signal.

REFERENCES:
patent: 5378946 (1995-01-01), Reime
patent: 5459749 (1995-10-01), Park
patent: 5799043 (1998-08-01), Chang et al.

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