Uninterruptible clock supply apparatus for fault tolerant comput

Details Uninterruptible clock supply apparatus for fault tolerant comput Uninterruptible clock supply apparatus for fault tolerant comput

1996-01-11

1998-12-22

Butler, Dennis M.

395181, G06F 106

Patent

active

058527281

ABSTRACT:
The present invention concerns clock source switchover between dual clock sources in the event of failure of any of them without affecting the clock output in the dual system, thereby preventing malfunctioning of processors therein. In the fault tolerant computer system of the invention, each of the plural processing units comprises a clock source, a clock selector, a clock stop detection unit, a clock phase adjusting unit, and a phase coincidence detection/operation suppression/resetting unit, whereby when switching over from a faulty clock source to a normal clock source in the event of clock failure, the clock phase adjusting unit ensures continuity in the output clock signals. The clock phase adjusting unit provided in the subsequent stage of the clock selector inserts the PLL circuit having an overdamping response characteristic obtained by lowering the gain of its loop filter.

REFERENCES:
patent: 5422915 (1995-06-01), Byers et al.
patent: 5557623 (1996-09-01), Driscoll
patent: 5568097 (1996-10-01), Woodman, Jr.
patent: 5623223 (1997-04-01), Pasqualini

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