Method and apparatus for reducing common mode voltage in multi-p

Details Method and apparatus for reducing common mode voltage in multi-p Method and apparatus for reducing common mode voltage in multi-p

1997-06-20

1998-12-22

Riley, Shawn

Electric power conversion systems

Current conversion

Using semiconductor-type converter

363 41, H02M 112

Patent

active

058525580

ABSTRACT:
Multi-phase power is provided to a load via the use of an inverter which has an even number of inverter legs. DC source voltage, such as from an AC-to-DC converter receiving power from a main AC power supply or from an independent DC power source such as a battery, is provided to the inverter. The DC source voltage is provided on DC bus lines of the inverter so as to be symmetric about ground. Switching devices in the inverter legs are controlled using a modulation strategy to synthesize desired output voltage waveforms on the inverter leg outputs from the voltage on the DC bus lines. The modulation strategy is subject to a modulation constraint such that, at any one time, half of the inverter legs provide a positive output voltage signal with respect to ground, and the other half of the inverter legs provide a negative output voltage signal, of equal magnitude, with respect to ground. If the multi-phase load to which the inverter is connected is a balanced impedance, the present invention makes possible the reduction or elimination of common mode voltage and, therefore, common mode current. Load balancing may be achieved using a multi-phase second order filter connected between the inverter leg outputs and the load. The present invention may be applied to power conversion systems including hard switching or soft switching inverters, and may be used in combination with conventional inverter modulation strategies.

REFERENCES:
patent: 3775663 (1973-11-01), Turnbull
patent: 4507724 (1985-03-01), Glennon
patent: 4730242 (1988-03-01), Divan
patent: 4833584 (1989-05-01), Divan
patent: 4864483 (1989-09-01), Divan
patent: 4942511 (1990-07-01), Lipo et al.
patent: 5280421 (1994-01-01), DeDoncker et al.
patent: 5648894 (1997-07-01), DeDoncker et al.
Giri Ventakaramanan, et al., Discrete Pulse Modulation Strategies for High-Frequency Inverter Systems, PESC 1989 Conf. Rec., pp. 1013-1020.
Thomas G. Habetler & D. M. Divan, Performance Characterization of a New Discrete Pulse Modulated Current Regulator, 1988, pp. 395-405.
Giri Venkataramanan & Deepak Divan, Pulse Width Modulation with Resonant DC Link Converters, 1990 IEEE IAS Annual Meeting Conf. Rec., pp. 984-990.
Jin-Woo Lee, et al., A New Quasi-Resonant DC Link Inverter, EPE Firenze 1991, pp. 4-202-4-206.

Affiliated with

Also associated with

Rating

Method and apparatus for reducing common mode voltage in multi-p does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus for reducing common mode voltage in multi-p, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for reducing common mode voltage in multi-p will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2052607