Boots – shoes – and leggings
Patent
1977-02-17
1978-11-21
Nusbaum, Mark E.
Boots, shoes, and leggings
G06F 1308, G06F 910
Patent
active
041268946
ABSTRACT:
A mapping arrangement for memory overlay wherein the address coordinates are referenced to a main serial memory. This main memory is partitioned into pages of equal size. An accelerator memory is concurrently loaded with a few pages representing a small portion of the main memory contents and is periodically overlayed with new memory contents on a page-at-a-time basis as the using system demands. During this overlay the fields of the accelerator memory are inscribed at corresponding main memory address coordinates together with code bits indicating whether certain memory fields go together and are therefore promoted as a single unit. The resulting effect is to cause an apparent increase in page size since more than one page is promoted as a consequence of a reference to a page not contained in the accelerator memory.
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Cronshaw David
Keddy James R.
Shemer Jack E.
Turner William D.
Nusbaum Mark E.
Raizes Sheldon F.
Ralabate James J.
Rhoads Jan E.
Xerox Corporation
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