High speed arithmetic logic circuit

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

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Details

341172, G06C 1500

Patent

active

058524169

ABSTRACT:
In order to realize a highly integrated, highly parallel system, there is provided a semiconductor circuit in which two or more input terminals are commonly connected to the non-inverting input terminal (+) of an operational amplifier via first capacitance means, the inverting input terminal (-) of the operational amplifier is connected to the output terminal of the operational amplifier via a second capacitance means two or more input terminals are commonly connected to the inverting input terminal via third capacitance means, and a first floating node as the node between the non-inverting input terminal (+) and the first capacitance means and a second floating node as the node between the inverting input terminal (-) and the second and third capacitance means are connected to reset means.

REFERENCES:
patent: 4429282 (1984-01-01), Saari
patent: 4794433 (1988-12-01), Milkovic

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