Patent
1979-01-05
1981-05-12
Wojciechowicz, Edward J.
357 22, 357 51, 357 59, H01L 2702
Patent
active
042675588
ABSTRACT:
A non-volatile semiconductor memory device of the electrically erasable type employs a floating gate which is programmed by application of high voltage across the source and drain so that hot electrons traverse the gate oxide. The floating gate is discharged by electron tunneling through an erase window which is separated from the control gate. An over-erase sensor transistor separate from the memory transistor prevents the floating gate from being discharged below a point where the memory transistor will be depletion mode.
REFERENCES:
patent: 4099196 (1978-07-01), Simko
Graham John G.
Texas Instruments Incorporated
Wojciechowicz Edward J.
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