Storage control system using plural buffer address arrays

Details Storage control system using plural buffer address arrays Storage control system using plural buffer address arrays

1984-10-25

1987-07-28

Williams, Jr., Archie E.

Boots, shoes, and leggings

G06F 1300, G11C 2900

Patent

active

046835334

ABSTRACT:
A storage control system controls the update operations on two buffer address arrays in a data processing system in which a plurality of processors are connected to a shared storage, at least one of the processors having a buffer storage. The first buffer address array is the directory of buffer storage. The second buffer address array contains the same data as that of the first buffer address array. The storage control system updates first the content of the second buffer address array then that of the first buffer address array in response to a block transfer to the buffer storage of the own processor and a store operation conducted by other processor on the shared storage. The storage control system permits to accept a new access request occurred in the own processor on condition that a block transfer to the own processor is finished and that the first buffer address array is updated in association with the block transfer.

REFERENCES:
patent: 3573745 (1971-04-01), May
patent: 3618040 (1971-11-01), Iwamoto et al.
patent: 4056844 (1977-11-01), Izumi
patent: 4349871 (1982-09-01), Lary
patent: 4392200 (1983-07-01), Arulpragasam et al.

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