Stacked metal-insulator semiconductor device

Details Stacked metal-insulator semiconductor device Stacked metal-insulator semiconductor device

1988-10-31

1989-12-05

James, Andrew J.

357 44, 357 49, 357 4, 357 231, H01L 2978

Patent

active

048856240

ABSTRACT:
A stacked MIS device is comprised of a semiconductor substrate of one conductivity type, a first pair of source and drain regions of the other conductivity type formed in the semiconductor substrate in spaced relation from each other to define therebetween a first channel region, a gate electrode disposed on the first channel region through a gate insulating film so as to extend transversely of the first channel region, a semiconductor film of the conductivity type disposed along the gate electrode through another gate insulating film, and a second pair of source and drain regions of the one conductivity type formed in the semiconductor film in spaced relation from each other to define therebetween a second channel region, the length of second channel region being arranged to intersect with that of the first channel region.

REFERENCES:
patent: 4603341 (1986-07-01), Bertin

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