Method of manufacturing nonvolatile semiconductor memory device

Details Method of manufacturing nonvolatile semiconductor memory device Method of manufacturing nonvolatile semiconductor memory device

1995-05-25

1996-05-21

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 24, 437 45, H01L 218247

Patent

active

055189431

ABSTRACT:
A gate insulating film is provided on the upper surface of an N-type silicon substrate. A floating gate is provided on the gate insulating film, an ONO film is provided on the floating gate, and a control gate is provided on the ONO film. Two diffusion layers for a source and a drain, respectively, are formed by using the control gate as a mask, in self-alignment, in the upper surface of the N-type silicon substrate. A damage layer is formed in a region of the semiconductor substrate, which is located beneath the first gate. The damage layer has an impurity concentration which is the highest at a point located in a depletion layer formed when a data-writing voltage is applied to the memory device and which is located outside a depletion layer formed when a data-reading voltage is applied to the memory device.

REFERENCES:
patent: 4642881 (1987-02-01), Matsukawa et al.
patent: 4945068 (1990-07-01), Sugaya
patent: 5098852 (1992-03-01), Niki et al.
patent: 5379253 (1995-01-01), Bergemont

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