1981-01-14
1983-12-06
Davie, James W.
357 41, 357 48, 357 52, 357 51, H01L 2704
Patent
active
044196849
ABSTRACT:
Well regions of p-type are disposed in a surface region of an n-type Si substrate of a semiconductor integrated circuit. The p-type well regions are arranged in the shape of islands, and various semiconductor elements are formed in the p-type well islands. The substrate surface region between the p-type well islands is filled with a depletion layer, and an interconnection layer is disposed on an insulating film over that body region contained within the depletion layer.
REFERENCES:
patent: 3601668 (1971-08-01), Slaten et al.
patent: 3612964 (1971-10-01), Kawazu
patent: 4167748 (1979-09-01), D'Angelo et al.
Nakamura Hideo
Sakai Yoshio
Davie James W.
Hitachi , Ltd.
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