System for forming test patterns for large scale integrated circ

Details System for forming test patterns for large scale integrated circ System for forming test patterns for large scale integrated circ

1995-03-14

1995-11-07

Teska, Kevin J.

Excavating

395500, 371 27, 3642643, 3642655, 3642664, 364282, 364DIG1, G06F 1125, G06F 11263

Patent

active

054653835

ABSTRACT:
A system for forming test patterns of an LSI as a test pattern formation target includes an extraction condition setting means and a state value data acquiring means. The extraction condition setting means sets a state value extraction condition for the LSI. The state value data acquires data of the state values of the input/output pins of the LSI during the logic simulation of a logic circuit including the LSI while the condition set by the extraction condition setting means is satisfied. The test patterns of the LSI are formed on the basis of the data acquired by the state value data acquiring means.

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"An Introduction To Cad For VLSI" by Stephen M. Trimberger Kluwer Academic Publishers, 1987, pp. 242-248.

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