Floating point processor having concurrent exponent/mantissa ope

Details Floating point processor having concurrent exponent/mantissa ope Floating point processor having concurrent exponent/mantissa ope

1978-12-11

1980-10-21

Malzahn, David H.

Boots, shoes, and leggings

G06F 748

Patent

active

042298016

ABSTRACT:
A Floating Point Processor or Floating Point Unit (FPU) with capability for performing exponent/sign-related calculations concurrently with mantissa-related calculations. The operation of the FPU within the context of a general purpose digital computer system is shown. The FPU has control, mantissa, and exponent/sign functional blocks which have unique architectural arrangements and interconnections therebetween, and also have interfacing structure for connecting system control and clock signals to the control block. The operation of the FPU is timed in a particular manner to permit its operation to be transparent to, or to not impact operation of the CPU, when the FPU communicates with main memory or the CPU.

REFERENCES:
patent: 3551665 (1970-12-01), Powers et al.
patent: 3697734 (1972-10-01), Booth et al.
patent: 3871578 (1975-03-01), Van De Goor et al.
patent: 4075704 (1978-02-01), O'Leary
patent: 4130879 (1978-12-01), Cushing et al.

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